Difference between revisions of "Cyclone dev board"

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This is the documentation page for the Cyclone dev board.  
 
This is the documentation page for the Cyclone dev board.  
  
== overview ==
+
== Overview ==
  
 
The Cyclone dev board has an USB connector and 4 20-pin IO connector. The brains of the PCB is an EP1C6T144C8 (or compatible) chip.
 
The Cyclone dev board has an USB connector and 4 20-pin IO connector. The brains of the PCB is an EP1C6T144C8 (or compatible) chip.
  
== pinout ==
+
== External resources ==
 +
 
 +
== Pinout ==
  
 
The 20 pin connectors are connected as follows  
 
The 20 pin connectors are connected as follows  
Line 124: Line 126:
 
<tr><td>4</td><td>5V</td></tr>
 
<tr><td>4</td><td>5V</td></tr>
 
</table>
 
</table>
 +
 +
JP2
 +
<table border=1>
 +
<tr><td>1</td><td>EXT_RESET</td></tr>
 +
<tr><td>2</td><td>GND</td></tr>
 +
</table>
 +
  
  
Line 139: Line 148:
 
3-4 5V from wall-wart powered regulator<br>
 
3-4 5V from wall-wart powered regulator<br>
  
== programming ==
+
== Programming ==
  
 
This section describes how you get your program into the FPGA.  
 
This section describes how you get your program into the FPGA.  
Line 145: Line 154:
 
=== Linux ===
 
=== Linux ===
  
=== windows ===
+
=== Windows ===
  
== writing programs ==
+
== Writing programs ==
  
 
The chip is an EP1C6T144C8. http://www.altera.com/literature/lit-cyc.jsp
 
The chip is an EP1C6T144C8. http://www.altera.com/literature/lit-cyc.jsp
  
== future hardware enhancements ==
+
== Future hardware enhancements ==
  
 
* Update Mini-B footprint
 
* Update Mini-B footprint
  
== future software enhancements ==
+
== Future software enhancements ==
 +
 
 +
 
 +
 
 +
== Changelog ==
 +
 
 +
=== 4.1 ===
 +
* Initial public release

Latest revision as of 13:23, 1 February 2012

Cyclone dev board

This is the documentation page for the Cyclone dev board.

Overview

The Cyclone dev board has an USB connector and 4 20-pin IO connector. The brains of the PCB is an EP1C6T144C8 (or compatible) chip.

External resources

Pinout

The 20 pin connectors are connected as follows

SV1

1GND
2GND
3pin 3
4pin 2
5pin 5
6pin 4
7pin 6
8pin 7
9pin 26
10pin 10
11pin 32
12pin 27
13pin 34
14pin 33
15pin 36
16pin 35
17pin 38
18pin 37
19VCC
20VCC

SV2

1GND
2GND
3pin 40
4pin 39
5pin 42
6pin 41
7pin 49
8pin 47
9pin 51
10pin 50
11pin 53
12pin 52
13pin 58
14pin 57
15pin 60
16pin 59
17pin 67
18pin 62
19VCC
20VCC

SV3

1GND
2GND
3pin 69
4pin 68
5pin 73
6pin 72
7pin 75
8pin 74
9pin 77
10pin 76
11pin 82
12pin 78
13pin 84
14pin 83
15pin 96
16pin 85
17pin 110
18pin 109
19VCC
20VCC

SV4

1GND
2GND
3pin 112
4pin 111
5pin 114
6pin 113
7pin 121
8pin 119
9pin 123
10pin 122
11pin 128
12pin 124
13pin 130
14pin 129
15pin 132
16pin 131
17pin 140
18pin 139
19VCC
20VCC

SV5

13V3
2GND
3CLK3
4CLK2
5CLK1
6CLK0

SV6

1GND
2VCCINT
33V3
45V

JP2

1EXT_RESET
2GND


  • led1 is connected to VCC
  • led2 is connected to pin 144
  • led3 is connected to conf_done
  • led4 is connected to pin 143
  • led5 is connected to pin 142
  • led6 is connected to pin 141

Jumper settings

JP1: 5V power supply selection
1-2 5V from USB
3-4 5V from wall-wart powered regulator

Programming

This section describes how you get your program into the FPGA.

Linux

Windows

Writing programs

The chip is an EP1C6T144C8. http://www.altera.com/literature/lit-cyc.jsp

Future hardware enhancements

  • Update Mini-B footprint

Future software enhancements

Changelog

4.1

  • Initial public release