General SPI protocol

From BitWizard WIKI
Revision as of 11:19, 5 March 2012 by Rew (talk | contribs) (Created page with " BitWizard expansion boards communicate with SPI. SPI is a well-known synchronous protocol, but not very well standardized. Many implementations require a separate "CS" line...")

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

BitWizard expansion boards communicate with SPI.

SPI is a well-known synchronous protocol, but not very well standardized. Many implementations require a separate "CS" line to each chip connected to the SPI bus. The BitWizard implementation does not have this requirement. This allows us to daisy chain a large number of boards without requiring an extra pin for every board.


The slaves use an ATTINY44 processor. These have a hardware universal serial interface (USI) module that can be configured as "SPI slave". Many things however have to be processed in software. This means that some time is required between each byte. This time is 20 microseconds. This is the time between sucessive bytes, not the dead time between bytes.

You can choose a clock frequency that suits you. The maximum is 2MHz. At 2MHz, transmitting one byte takes 4 mircoseconds, so a delay of 16 microseconds between bytes is required.

At 0.625MHz, transmission of a byte takes 12.8 microseconds, so a delay between bytes of only 7.2 microseconds is required.

With new firmware written in assembly (or at least the interrupt handler routine) this might be improved.